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5M160ZE64C4N 参数 Datasheet PDF下载

5M160ZE64C4N图片预览
型号: 5M160ZE64C4N
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 7.9ns, 128-Cell, CMOS, PQFP64, 9 X 9 MM, 0.40 MM PITCH, LEAD FREE, PLASTIC, EQFP-64]
分类和应用: 时钟可编程逻辑
文件页数/大小: 166 页 / 3966 K
品牌: INTEL [ INTEL ]
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Chapter 5: Using MAX V Devices in Multi-Voltage Systems  
5–3  
MultiVolt I/O Operation  
MultiVolt I/O Operation  
MAX V devices allow the device core and I/O blocks to be powered-up with separate  
supply voltages. The VCCINTpins supply power to the device core and the VCCIOpins  
supply power to the device I/O buffers. The VCCINTpins are powered-up with 1.8 V  
for MAX V devices. All the VCCIOpins for a given I/O bank that have MultiVolt  
capability must be supplied from the same voltage level (for example, 5.0, 3.3, 2.5, 1.8,  
1.5, or 1.2 V). Figure 5–2 shows how to implement a multiple-voltage system for  
MAX V devices.  
Figure 5–2. Implementing a Multi-Voltage System with a MAX V Device (Note 1), (2)  
1.8-V  
Power Supply  
V
CCINT  
3.3-, 2.5-, 1.8-,  
1.5-, 1.2-V  
Device  
V
CCIO  
V
CCIO  
5.0-V  
Device  
MAX V  
Device  
Notes to Figure 5–2:  
(1) MAX V devices can drive a 5.0-V transistor-to-transistor logic (TTL) input when VCCIO = 3.3 V. To drive a 5.0-V  
CMOS, you must have an open-drain setting with an internal I/O clamp diode and external resistor.  
(2) MAX V devices can be 5.0-V tolerant with the use of an external resistor and the internal I/O clamp diode on  
5M1270Z and 5M2210Z devices.  
5.0-V Device Compatibility  
A MAX V device can drive a 5.0-V TTL device by connecting the VCCIOpins of the  
MAX V device to 3.3 V. This is possible because the output high voltage (VOH) of a  
3.3-V interface meets the minimum high-level voltage of 2.4 V of a 5.0-V TTL device.  
A MAX V device may not correctly interoperate with a 5.0-V CMOS device if the  
output of the MAX V device is connected directly to the input of the 5.0-V CMOS  
device. If the MAX V device‘s VOUT is greater than VCCIO, the PMOS pull-up transistor  
still conducts if the pin is driving high, preventing an external pull-up resistor from  
pulling the signal to 5.0 V. To make MAX V device outputs compatible with 5.0-V  
CMOS devices, configure the output pins as open-drain pins with the I/O clamp  
diode enabled and use an external pull-up resistor.  
December 2010 Altera Corporation  
MAX V Device Handbook  
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