3–20
Chapter 3: DC and Switching Characteristics for MAX V Devices
Timing Model and Specifications
Table 3–26 lists the external I/O timing parameters for the 5M40Z, 5M80Z, 5M160Z,
and 5M240Z devices.
Table 3–26. Global Clock External I/O Timing Parameters for the 5M40Z, 5M80Z, 5M160Z, and 5M240Z Devices
(Note 1), (2)
C4
C5, I5
Symbol
tPD1
Parameter
Condition
Unit
Min
—
Max
7.9
5.8
—
Min
—
Max
14.0
8.5
—
Worst case pin-to-pin delay through one LUT
Best case pin-to-pin delay through one LUT
Global clock setup time
10 pF
10 pF
—
ns
ns
ns
ns
ns
ps
ps
tPD2
tSU
tH
—
—
2.4
0
4.6
0
Global clock hold time
—
—
—
tCO
tCH
tCL
Global clock to output delay
Global clock high time
10 pF
—
2.0
253
253
6.6
—
2.0
339
339
8.6
—
Global clock low time
—
—
—
Minimum global clock period for
16-bit counter
tCNT
fCNT
—
—
5.4
—
—
8.4
—
—
ns
Maximum global clock frequency for 16-bit
counter
184.1
118.3
MHz
Notes to Table 3–26:
(1) The maximum frequency is limited by the I/O standard on the clock input pin. The 16-bit counter critical delay performs faster than this global
clock input pin maximum frequency.
(2) Not applicable to the T144 package of the 5M240Z device.
Table 3–27 lists the external I/O timing parameters for the T144 package of the
5M240Z device.
Table 3–27. Global Clock External I/O Timing Parameters for the 5M240Z Device (Note 1), (2)
C4
C5, I5
Symbol
tPD1
Parameter
Condition
Unit
Min
—
Max
9.5
5.7
—
Min
—
Max
17.7
8.5
—
Worst case pin-to-pin delay through one LUT
Best case pin-to-pin delay through one LUT
Global clock setup time
10 pF
10 pF
—
ns
ns
ns
ns
ns
ps
ps
tPD2
tSU
tH
—
—
2.2
0
4.4
0
Global clock hold time
—
—
—
tCO
tCH
tCL
Global clock to output delay
Global clock high time
10 pF
—
2.0
253
253
6.7
—
2.0
339
339
8.7
—
Global clock low time
—
—
—
Minimum global clock period for 16-bit
counter
tCNT
fCNT
—
—
5.4
—
—
8.4
—
—
ns
Maximum global clock frequency for 16-bit
counter
184.1
118.3
MHz
Notes to Table 3–27:
(1) The maximum frequency is limited by the I/O standard on the clock input pin. The 16-bit counter critical delay performs faster than this global
clock input pin maximum frequency.
(2) Only applicable to the T144 package of the 5M240Z device.
MAX V Device Handbook
May 2011 Altera Corporation
INTEL [ INTEL ]
