Cyclone V Device Datasheet
CV-51002 | 2018.05.07
Symbol/Description
Condition
Transceiver Speed Grade 5(30)
Transceiver Speed Grade 6
Transceiver Speed Grade 7
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Minimum differential eye
opening at the receiver
serial input pins(40)
—
110
—
—
110
—
—
110
—
—
mV
Differential on-chip
termination resistors
85-Ω setting
100-Ω setting
120-Ω setting
150-Ω setting
—
—
—
—
85
—
—
—
—
—
—
—
—
85
—
—
—
—
—
—
—
—
85
—
—
—
—
Ω
Ω
Ω
Ω
V
100
120
150
100
120
100
120
150
150
VICM (AC coupled)
2.5 V PCML, LVPECL,
and LVDS
VCCE_GXBL supply(34)(35)
VCCE_GXBL supply
VCCE_GXBL supply
1.5 V PCML
0.65/0.75/0.8 (41)
V
(42)
tLTR
—
—
—
—
—
—
—
—
—
10
—
—
—
—
—
—
10
4
—
—
—
—
—
—
10
4
µs
µs
µs
(43)
tLTD
—
—
4
4
(44)
tLTD_manual
—
4
—
4
(45)
tLTR_LTD_manual
15
—
15
—
15
—
µs
continued...
(40)
The differential eye opening specification at the receiver input pins assumes that you have disabled the Receiver Equalization feature.
If you enable the Receiver Equalization feature, the receiver circuitry can tolerate a lower minimum eye opening, depending on the
equalization level.
(41)
(42)
The AC coupled VICM = 650 mV for Cyclone V GX and SX in PCIe mode only. The AC coupled VICM = 750mV for Cyclone V GT and ST in
PCIe mode only.
tLTR is the time required for the receive clock data recovery (CDR) to lock to the input reference clock frequency after coming out of
reset.
(43)
(44)
tLTD is time required for the receiver CDR to start recovering valid data after the rx_is_lockedtodata signal goes high.
tLTD_manual is the time required for the receiver CDR to start recovering valid data after the rx_is_lockedtodata signal goes high
when the CDR is functioning in the manual mode.
Cyclone V Device Datasheet
28
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