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5CSEMA5F31C8N 参数 Datasheet PDF下载

5CSEMA5F31C8N图片预览
型号: 5CSEMA5F31C8N
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 85000-Cell, CMOS, PBGA896, ROHS COMPLIANT, FBGA-896]
分类和应用: 可编程逻辑
文件页数/大小: 93 页 / 999 K
品牌: INTEL [ INTEL ]
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Cyclone V Device Datasheet  
CV-51002 | 2018.05.07  
ΔV is the variation of voltage with respect to the VCCIO at power up.  
dR/dT is the percentage change of RSCAL with temperature.  
dR/dV is the percentage change of RSCAL with voltage.  
OCT Variation after Power-Up Calibration  
Table 11.  
OCT Variation after Power-Up Calibration for Cyclone V Devices  
This table lists OCT variation with temperature and voltage after power-up calibration. The OCT variation is valid for a VCCIO range of ±5% and a temperature  
range of 0°C to 85°C.  
Symbol  
Description  
VCCIO (V)  
3.0  
Value  
0.100  
0.100  
0.100  
0.100  
0.150  
0.150  
0.150  
0.189  
0.208  
0.266  
0.273  
0.200  
0.200  
0.317  
Unit  
dR/dV  
OCT variation with voltage without recalibration  
%/mV  
2.5  
1.8  
1.5  
1.35  
1.25  
1.2  
dR/dT  
OCT variation with temperature without recalibration  
3.0  
%/°C  
2.5  
1.8  
1.5  
1.35  
1.25  
1.2  
Cyclone V Device Datasheet  
16  
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