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5CGTFD9E5F31C7N 参数 Datasheet PDF下载

5CGTFD9E5F31C7N图片预览
型号: 5CGTFD9E5F31C7N
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 301000-Cell, CMOS, PBGA896, ROHS COMPLIANT, FBGA-896]
分类和应用: 可编程逻辑
文件页数/大小: 95 页 / 1359 K
品牌: INTEL [ INTEL ]
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CV-51002  
2015.12.04  
29  
Transceiver Specifications for Cyclone V GX, GT, SX, and ST Devices  
Transceiver Speed Grade 5(30)  
Transceiver Speed Grade 6  
Transceiver Speed Grade 7  
Symbol/Description  
Condition  
Unit  
Min  
Typ  
Max  
Min  
Typ  
Max  
Min  
Typ  
Max  
Intra-differential  
pair skew  
TX VCM = 0.65 V  
and slew rate of 15  
ps  
15  
15  
15  
ps  
Intra-transceiver  
block transmitter  
channel-to-channel  
skew  
×6 PMA bonded  
mode  
180  
500  
180  
500  
180  
500  
ps  
ps  
Inter-transceiver  
block transmitter  
channel-to-channel  
skew  
×N PMA bonded  
mode  
Table 24: CMU PLL Specifications for Cyclone V GX, GT, SX, and ST Devices  
Transceiver Speed Grade 5(30)  
Transceiver Speed Grade 6  
Transceiver Speed Grade 7  
Symbol/Description  
Condition  
Unit  
Min  
Typ  
Max  
Min  
Typ  
Max  
Min  
Typ  
Max  
Supported data  
range  
614  
5000/  
614  
3125  
614  
2500  
Mbps  
6144(35)  
fPLL supported data  
range  
614  
3125  
614  
3125  
614  
2500  
Mbps  
Table 25: Transceiver-FPGA Fabric Interface Specifications for Cyclone V GX, GT, SX, and ST Devices  
Transceiver Speed Grade 5(30)  
Transceiver Speed Grade 6  
Transceiver Speed Grade 7  
Symbol/Description  
Condition  
Unit  
Min  
Typ  
Max  
Min  
Typ  
Max  
Min  
Typ  
Max  
Interface speed  
25  
187.5  
25  
187.5  
25  
163.84  
MHz  
(single-width mode)  
Interface speed  
(double-width  
mode)  
25  
163.84  
25  
163.84  
25  
156.25  
MHz  
Cyclone V Device Datasheet  
Send Feedback  
Altera Corporation  
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