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5CEBA2F23C6N 参数 Datasheet PDF下载

5CEBA2F23C6N图片预览
型号: 5CEBA2F23C6N
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, PBGA484, ROHS COMPLIANT, FBGA-484]
分类和应用: 可编程逻辑
文件页数/大小: 64 页 / 1355 K
品牌: INTEL [ INTEL ]
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Page 56  
Configuration Specification  
Table 58. Minimum Configuration Time Estimation for Cyclone V Devices (Part 2 of 2)  
Active Serial (1)  
Fast Passive Parallel (2)  
Minimum  
Configuration  
Time (ms)  
Minimum  
Configuration Time  
(ms)  
Variant  
Member Code  
DCLK  
(MHz)  
DCLK  
(MHz)  
Width  
Width  
D5  
D6  
4
4
100  
100  
140  
140  
16  
16  
125  
125  
28  
28  
Cyclone V ST  
Notes to Table 57:  
(1) DCLK frequency of 100 MHz using external CLKUSR  
.
(2) Maximum FPGA FPP bandwidth may exceed bandwidth available from some external storage or control logic.  
Remote System Upgrades Circuitry Timing Specification  
Table 59 lists the timing parameter specifications for the remote system upgrade  
circuitry.  
Table 59. Remote System Upgrade Circuitry Timing Specification for Cyclone V Devices  
Parameter  
Minimum  
Maximum  
Unit  
(1)  
(3)  
40  
MHz  
tMAX_RU_CLK  
(2)  
tRU_nCONFIG  
250  
250  
ns  
ns  
tRU_nRSTIMER  
Notes to Table 59:  
(1) This clock is user-supplied to the remote system upgrade circuitry. If you are using the ALTREMOTE_UPDATE  
megafunction, the clock user-supplied to the ALTREMOTE_UPDATE megafunction must meet this specification.  
(2) This is equivalent to strobing the reconfiguration input of the ALTREMOTE_UPDATE megafunction high for the  
minimum timing specification. For more information, refer to the “Remote System Upgrade State Machine”  
section in the Configuration, Design Security, and Remote System Upgrades in Cyclone V Devices chapter.  
(3) This is equivalent to strobing the reset timer input of the ALTREMOTE_UPDATE megafunction high for the  
minimum timing specification. For more information, refer to the “User Watchdog Timer” section in the  
Configuration, Design Security, and Remote System Upgrades in Cyclone V Devices chapter.  
User Watchdog Internal Oscillator Frequency Specification  
Table 60 lists the frequency specifications for the user watchdog internal oscillator.  
Table 60. User Watchdog Internal Oscillator Frequency Specifications for Cyclone V Devices  
Parameter  
Minimum  
Typical  
Maximum  
Unit  
User watchdog internal  
oscillator frequency  
5.3  
7.9  
12.5  
MHz  
Cyclone V Device Datasheet  
December 2013 Altera Corporation  
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