Configuration Specification
Page 55
Table 57. Uncompressed .rbf Sizes for Cyclone V Devices (Part 2 of 2)
Variant
Member Code
Configuration .rbf Size (bits)
33,958,336
IOCSR .rbf Size (bits)
322,072
C2 (2)
C4 (2)
C5
33,958,336
322,072
Cyclone V SX
56,057,408
324,888
C6
56,057,408
324,888
D5
56,057,408
324,888
Cyclone V ST
D6
56,057,408
324,888
Notes to Table 57:
(1) No PCIe hard IP, configuration via protocol (CvP) is not supported in this family.
(2) This device will be supported in a future release of the Quartus II software.
Table 58 lists the minimum configuration time estimation for Cyclone V devices. The
estimated values are based on the configuration .rbf sizes in Table 57.
Table 58. Minimum Configuration Time Estimation for Cyclone V Devices (Part 1 of 2)
Active Serial (1) Fast Passive Parallel (2)
Minimum
Configuration
Time (ms)
Minimum
Configuration Time
(ms)
Variant
Member Code
DCLK
(MHz)
DCLK
(MHz)
Width
Width
A2
A4
A5
A7
A9
C3
C4
C5
C7
C9
D5
D7
D9
A2
A4
A5
A6
C2
C4
C5
C6
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
53
53
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
125
125
125
125
125
125
125
125
125
125
125
125
125
125
125
125
125
125
125
125
125
11
11
17
28
51
7
Cyclone V E
85
140
257
36
85
17
17
28
51
17
28
51
17
17
28
28
17
17
28
28
Cyclone V GX
85
140
257
85
Cyclone V GT
Cyclone V SE
140
257
85
85
140
140
85
85
Cyclone V SX
140
140
December 2013 Altera Corporation
Cyclone V Device Datasheet
INTEL [ INTEL ]
