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Configuration Specification
Initialization
Table 56 lists the initialization clock source option, the applicable configuration
schemes, and the maximum frequency for Cyclone V devices.
Table 56. Initialization Clock Source Option and the Maximum Frequency for Cyclone V Devices
Maximum
Frequency
(MHz)
Minimum Number of
Initialization Clock Source Configuration Schemes
Clock Cycles
Internal Oscillator
AS, PS, and FPP
PS and FPP
AS
12.5
125
100
Tinit
(1)
CLKUSR
Note to Table 56:
(1) To enable CLKUSR as the initialization clock source, turn on the Enable user-supplied start-up clock (CLKUSR)
option in the Quartus II software from the General panel of the Device and Pin Options dialog box.
Configuration Files
Use Table 57 to estimate the file size before design compilation. Different
configuration file formats, such as a hexadecimal file (.hex) or tabular text file (.ttf)
format, have different file sizes.
For the different types of configuration file and file sizes, refer to the Quartus II
software. However, for a specific version of the Quartus II software, any design
targeted for the same device has the same uncompressed configuration file size.
Table 57 lists the uncompressed raw binary file (.rbf) sizes for Cyclone V devices.
Table 57. Uncompressed .rbf Sizes for Cyclone V Devices (Part 1 of 2)
Variant
Member Code
Configuration .rbf Size (bits)
21,061,120
IOCSR .rbf Size (bits)
275,608
275,608
322,072
435,288
400,408
320,280
322,072
322,072
435,288
400,408
322,072
435,288
400,408
322,072
322,072
324,888
324,888
A2
A4
21,061,120
Cyclone V E (1)
A5
33,958,336
A7
56,167,328
A9
102,871,552
14,512,096
C3
C4
33,958,336
Cyclone V GX
C5
33,958,336
C7
56,167,328
C9
102,871,552
33,958,336
D5
D7
D9
A2 (2)
A4 (2)
A5
Cyclone V GT
56,167,328
102,871,552
33,958,336
33,958,336
Cyclone V SE (1)
56,057,408
A6
56,057,408
Cyclone V Device Datasheet
December 2013 Altera Corporation
INTEL [ INTEL ]
