AV-51002
2015.12.16
1-24
Transceiver Specifications for Arria V GX and SX Devices
Transceiver Speed Grade 4
Transceiver Speed Grade 6
Symbol/Description
Condition
Unit
Min
Typ
Max
Min
Typ
Max
Peak-to-peak differential
input voltage
—
200
—
300(25)
2000
/
200
—
300(25)
2000
/
mV
Spread-spectrum
modulating clock
frequency
PCI Express® (PCIe)
30
—
33
30
—
33
kHz
Spread-spectrum
downspread
PCIe
—
—
—
0 to –0.5%
100
—
—
—
—
0 to –0.5%
100
—
—
—
Ω
On-chip termination
resistors
VICM (AC coupled)
VICM (DC coupled)
—
—
1.1/1.15(26)
—
—
—
1.1/1.15(26)
—
—
V
HCSL I/O standard for
the PCIe reference
clock
250
550
250
550
mV
10 Hz
100 Hz
1 KHz
10 KHz
100 KHz
≥1 MHz
—
—
—
—
—
—
—
—
—
–50
–80
—
—
—
—
—
—
—
—
–50
–80
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
Ω
—
—
—
–110
–120
–120
–130
—
—
–110
–120
–120
–130
—
Transmitter REFCLKphase
noise(27)
—
—
—
—
—
—
RREF
2000 1%
2000 1%
(25)
The maximum peak-to peak differential input voltage of 300 mV is allowed for DC coupled link.
(26)
For data rate ≤3.2 Gbps, connect VCCR_GXBL/R to either 1.1-V or 1.15-V power supply. For data rate >3.2 Gbps, connect VCCR_GXBL/R to a 1.15-V
power supply. For details, refer to the Arria V GT, GX, ST, and SX Device Family Pin Connection Guidelines.
The transmitter REFCLKphase jitter is 30 ps p-p at bit error rate (BER) 10-12.
(27)
Arria V GX, GT, SX, and ST Device Datasheet
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