AV-51002
2015.12.16
2-71
Remote System Upgrades Circuitry Timing Specification
Table 2-62: Uncompressed .rbf Sizes for Arria V GZ Devices
Variant
Member Code
Configuration .rbf Size (bits)
IOCSR .rbf Size (bits) (222)
562,208
E1
E3
E5
E7
137,598,880
137,598,880
213,798,880
213,798,880
562,208
Arria V GZ
561,760
561,760
Table 2-63: Minimum Configuration Time Estimation for Arria V GZ Devices
Active Serial (223)
Fast Passive Parallel (224)
Variant
Member Code
Width
DCLK (MHz)
Min Config Time
Width
DCLK (MHz)
Min Config Time
(ms)
344
344
534
534
(ms)
E1
E3
E5
E7
4
4
4
4
100
100
100
100
32
32
32
32
100
100
100
100
43
43
Arria V GZ
67
67
Remote System Upgrades Circuitry Timing Specification
Table 2-64: Remote System Upgrade Circuitry Timing Specifications
Parameter
Minimum
250
Maximum
Unit
ns
(225)
tRU_nCONFIG
—
—
(226)
tRU_nRSTIMER
250
ns
(222)
(223)
(224)
The IOCSR .rbf size is specifically for the Configuration via Protocol (CvP) feature.
DCLK frequency of 100 MHz using external CLKUSR.
Max FPGA FPP bandwidth may exceed bandwidth available from some external storage or control logic.
Arria V GZ Device Datasheet
Send Feedback
Altera Corporation
INTEL [ INTEL ]
