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326769-002 参数 Datasheet PDF下载

326769-002图片预览
型号: 326769-002
PDF下载: 下载PDF文件 查看货源
内容描述: 移动第三代英特尔®科雷亚?? ¢处理器家族 [Mobile 3rd Generation Intel® Core™ Processor Family]
分类和应用:
文件页数/大小: 342 页 / 2513 K
品牌: INTEL [ INTEL ]
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Processor Configuration Registers  
B/D/F/Type:  
Address Offset:  
Reset Value:  
Access:  
0/0/0/GFXVTBAR  
10–17h  
0000000000F0101Ah  
RO, RO-V  
64 bits  
Size:  
BIOS Optimal Default  
00000000000h  
Reset  
Value  
RST/  
PWR  
Bit  
Access  
Description  
Coherency (C)  
This field indicates if hardware access to the root, context, page-  
table and interrupt-remap structures are coherent (snooped) or  
not.  
0
RO  
0b  
Uncore  
0 = Hardware accesses to remapping structures are non-  
coherent.  
1 = Hardware accesses to remapping structures are coherent.  
Hardware access to advanced fault log and invalidation queue are  
always coherent.  
2.18.4  
GCMD_REG—Global Command Register  
This register controls remapping hardware. If multiple control fields in this register  
need to be modified, software must serialize the modifications through multiple writes  
to this register.  
B/D/F/Type:  
Address Offset:  
Reset Value:  
Access:  
0/0/0/GFXVTBAR  
18–1Bh  
00000000h  
RO, WO  
32 bits  
000000h  
Size:  
BIOS Optimal Default  
Reset  
Value  
RST/  
PWR  
Bit  
Access  
Description  
Translation Enable (TE)  
Software writes to this field to request hardware to  
enable/disable DMA-remapping:  
0 = Disable DMA remapping  
1 = Enable DMA remapping  
Hardware reports the status of the translation enable operation  
through the TES field in the Global Status register.  
There may be active DMA requests in the platform when software  
updates this field. Hardware must enable or disable remapping  
logic only at deterministic transaction boundaries, so that any in-  
flight transaction is either subject to remapping or not at all.  
31  
WO  
0b  
Uncore  
Hardware implementations supporting DMA draining must drain  
any in-flight DMA read/write requests queued within the Root-  
Complex before completing the translation enable command and  
reflecting the status of the command through the TES field in the  
Global Status register.  
The value returned on a read of this field is undefined.  
Datasheet, Volume 2  
267