Processor Configuration Registers
B/D/F/Type:
Address Offset:
Reset Value:
Access:
0/0/0/GFXVTBAR
8–Fh
00C0000020E60262h
RO
64 bits
000h
Size:
BIOS Optimal Default
Reset
Value
RST/
PWR
Bit
Access
Description
Supported Adjusted Guest Address Widths (SAGAW)
This 5-bit field indicates the supported adjusted guest address
widths (which in turn represents the levels of page-table walks
for the 4 KB base page size) supported by the hardware
implementation.
A value of 1 in any of these bits indicates the corresponding
adjusted guest address width is supported. The adjusted guest
address widths corresponding to various bit positions within this
field are:
0 = 30-bit AGAW (2-level page table)
1 = 39-bit AGAW (3-level page table)
2 = 48-bit AGAW (4-level page table)
3 = 57-bit AGAW (5-level page table)
4 = 64-bit AGAW (6-level page table)
12:8
RO
00010b
Uncore
Software must ensure that the adjusted guest address width
used to setup the page tables is one of the supported guest
address widths reported in this field.
Caching Mode (CM)
0 = Not-present and erroneous entries are not cached in any of
the remapping caches. Invalidations are not required for
modifications to individual not present or invalid entries.
However, any modifications that result in decreasing the
effective permissions or partial permission increases require
invalidations for them to be effective.
7
RO
0b
Uncore
1 = Not-present and erroneous mappings may be cached in the
remapping caches. Any software updates to the remapping
structures (including updates to "not-present" or erroneous
entries) require explicit invalidation.
Hardware implementations of this architecture must support a
value of 0 in this field.
Protected High-Memory Region (PHMR)
6
5
RO
RO
1b
1b
Uncore
Uncore
0 = Protected high-memory region is not supported.
1 = Protected high-memory region is supported.
Protected Low-Memory Region (PLMR)
0 = Protected low-memory region is not supported.
1 = Protected low-memory region is supported.
264
Datasheet, Volume 2
INTEL [ INTEL ]
