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326769-002 参数 Datasheet PDF下载

326769-002图片预览
型号: 326769-002
PDF下载: 下载PDF文件 查看货源
内容描述: 移动第三代英特尔®科雷亚?? ¢处理器家族 [Mobile 3rd Generation Intel® Core™ Processor Family]
分类和应用:
文件页数/大小: 342 页 / 2513 K
品牌: INTEL [ INTEL ]
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Processor Configuration Registers  
B/D/F/Type:  
Address Offset:  
Reset Value:  
Access:  
0/0/0/GFXVTBAR  
18–1Bh  
00000000h  
RO, WO  
32 bits  
Size:  
BIOS Optimal Default  
000000h  
Reset  
Value  
RST/  
PWR  
Bit  
Access  
Description  
Set Interrupt Remap Table Pointer (SIRTP)  
This field is valid only for implementations supporting interrupt-  
remapping.  
Software sets this field to set/update the interrupt remapping  
table pointer used by hardware. The interrupt remapping table  
pointer is specified through the Interrupt Remapping Table  
Address (IRTA_REG) register.  
Hardware reports the status of the 'Set Interrupt Remap Table  
Pointer’ operation through the IRTPS field in the Global Status  
register.  
The 'Set Interrupt Remap Table Pointer' operation must be  
performed before enabling or re-enabling (after disabling)  
interrupt-remapping hardware through the IRE field.  
After a 'Set Interrupt Remap Table Pointer' operation, software  
must globally invalidate the interrupt entry cache. This is  
required to ensure hardware uses only the interrupt-remapping  
entries referenced by the new interrupt remap table pointer, and  
not any stale cached entries.  
24  
WO  
0b  
Uncore  
While interrupt remapping is active, software may update the  
interrupt remapping table pointer through this field. However, to  
ensure valid in-flight interrupt requests are deterministically  
remapped, software must ensure that the structures referenced  
by the new interrupt remap table pointer are programmed to  
provide the same remapping results as the structures referenced  
by the previous interrupt remap table pointer.  
Clearing this bit has no effect. The value returned on a read of  
this field is undefined.  
23:0  
RO  
0h  
Reserved (RSVD)  
270  
Datasheet, Volume 2