Chipset Configuration Registers
10.1.60 D25IP—Device 25 Interrupt Pin Register
Offset Address: 3118–311Bh
Attribute:
Size:
R/W
32-bit
Default Value:
00000001h
Bit
Description
31:4
3:0
Reserved
GBE LAN Pin (LIP) — R/W. Indicates which pin the internal GbE LAN controller
drives as its interrupt
0h = No Interrupt
1h = INTA# (Default)
2h = INTB#
3h = INTC#
4h = INTD#
5h-Fh = Reserved
10.1.61 D31IR—Device 31 Interrupt Route Register
Offset Address: 3140–3141h
Attribute:
Size:
R/W
16-bit
Default Value:
3210h
Bit
Description
15
14:12
11
Reserved
Interrupt D Pin Route (IDR) — R/W. Indicates which physical pin on the Intel ICH
is connected to the INTD# pin reported for device 31 functions.
0h = PIRQA#
1h = PIRQB#
2h = PIRQC#
3h = PIRQD# (Default)
4h = PIRQE#
5h = PIRQF#
6h = PIRQG#
7h = PIRQH#
Reserved
Interrupt C Pin Route (ICR) — R/W. Indicates which physical pin on the ICH is
connected to the INTC# pin reported for device 31 functions.
0h = PIRQA#
1h = PIRQB#
2h = PIRQC# (Default)
3h = PIRQD#
4h = PIRQE#
5h = PIRQF#
10:8
6h = PIRQG#
7h = PIRQH#
7
Reserved
334
Datasheet
INTEL [ INTEL ]
