Chipset Configuration Registers
Bit
Description
Interrupt B Pin Route (IBR) — R/W. Indicates which physical pin on the ICH is
connected to the INTB# pin reported for device 31 functions.
0h = PIRQA#
1h = PIRQB# (Default)
2h = PIRQC#
3h = PIRQD#
4h = PIRQE#
6:4
5h = PIRQF#
6h = PIRQG#
7h = PIRQH#
3
Reserved
Interrupt A Pin Route (IAR) — R/W. Indicates which physical pin on the ICH is
connected to the INTA# pin reported for device 31 functions.
0h = PIRQA# (Default)
1h = PIRQB#
2h = PIRQC#
3h = PIRQD#
4h = PIRQE#
2:0
5h = PIRQF#
6h = PIRQG#
7h = PIRQH#
10.1.62 D30IR—Device 30 Interrupt Route Register
Offset Address: 3142–3143h
Attribute:
Size:
RO
16-bit
Default Value:
0000h
Bit
Description
15:0
Reserved. No interrupts generated from Device 30.
Datasheet
335
INTEL [ INTEL ]
