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319973-003 参数 Datasheet PDF下载

319973-003图片预览
型号: 319973-003
PDF下载: 下载PDF文件 查看货源
内容描述: 英特尔I / O控制器中枢10 [Intel I/O Controller Hub 10]
分类和应用: 控制器
文件页数/大小: 840 页 / 5889 K
品牌: INTEL [ INTEL ]
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Functional Description  
5.16.7  
Power Management Operation  
Power management of the ICH10 SATA controller and ports will cover operations of the  
host controller and the SATA wire.  
5.16.7.1  
Power State Mappings  
The D0 PCI power management state for device is supported by the ICH10 SATA  
controller.  
SATA devices may also have multiple power states. From parallel ATA, three device  
states are supported through ACPI. They are:  
D0 – Device is working and instantly available.  
D1 – device enters when it receives a STANDBY IMMEDIATE command. Exit latency  
from this state is in seconds  
D3 – from the SATA device’s perspective, no different than a D1 state, in that it is  
entered via the STANDBY IMMEDIATE command. However, an ACPI method is also  
called which will reset the device and then cut its power.  
Each of these device states are subsets of the host controller’s D0 state.  
Finally, SATA defines three PHY layer power states, which have no equivalent mappings  
to parallel ATA. They are:  
PHY READY – PHY logic and PLL are both on and active  
Partial – PHY logic is powered, but in a reduced state. Exit latency is no longer  
than 10 ns  
Slumber – PHY logic is powered, but in a reduced state. Exit latency can be up to  
10 ms.  
Since these states have much lower exit latency than the ACPI D1 and D3 states, the  
SATA controller defines these states as sub-states of the device D0 state.  
Figure 5-10. SATA Power States  
Power  
Intel® ICH SATA Controller = D0  
Device = D1  
Device = D0  
PHY = PHY =  
Device = D3  
PHY = PHY =  
PHY =  
PHY =  
PHY =  
Ready  
PHY =  
Slumber Off (port  
Slumber Off (port  
Partial Slumber Off (port  
disabled)  
disabled)  
disabled)  
Resume Latency  
Datasheet  
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