Contents
1
Introduction............................................................................................................ 19
1.1
1.2
1.3
Terminology ..................................................................................................... 20
Reference Documents........................................................................................ 22
Overview ......................................................................................................... 23
1.3.1 Processor Interface................................................................................. 23
1.3.2 System Memory Controller ...................................................................... 24
1.3.3 USB Host .............................................................................................. 24
1.3.4 USB Client............................................................................................. 24
1.3.5 PCI Express* ......................................................................................... 24
1.3.6 LPC Interface......................................................................................... 24
1.3.7 Parallel ATA (PATA) ................................................................................ 25
1.3.8 Intel® Graphics Media Accelerator 500 (Intel® GMA 500) ........................... 25
1.3.9 Display Interfaces .................................................................................. 25
1.3.10 Secure Digital I/O (SDIO)/Multimedia Card (MMC) Controller ....................... 26
1.3.11 SMBus Host Controller ............................................................................ 26
1.3.12 Intel® High Definition Audio (Intel® HD Audio) Controller ........................... 26
1.3.13 General Purpose I/O (GPIO)..................................................................... 26
1.3.14 Power Management ................................................................................ 26
2
Signal Description ................................................................................................... 27
2.1
2.2
2.3
Host Interface Signals........................................................................................ 29
System Memory Signals..................................................................................... 32
Integrated Display Interfaces.............................................................................. 34
2.3.1 LVDS Signals......................................................................................... 34
2.3.2 Serial Digital Video Output (SDVO) Signals ................................................ 34
2.3.3 Display Data Channel (DDC) and GMBus Support........................................ 35
Universal Serial Bus (USB) Signals....................................................................... 36
PCI Express* Signals ......................................................................................... 36
Secure Digital I/O (SDIO)/MultiMedia Card (MMC) Signals ...................................... 37
Parallel ATA (PATA) Signals ................................................................................ 38
Intel HD Audio Interface..................................................................................... 39
LPC Interface.................................................................................................... 40
2.4
2.5
2.6
2.7
2.8
2.9
2.10 SMBus Interface................................................................................................ 40
2.11 Power Management Interface.............................................................................. 41
2.12 Real Time Clock Interface................................................................................... 42
2.13 JTAG Interface.................................................................................................. 43
2.14 Miscellaneous Signals and Clocks......................................................................... 43
2.15 General Purpose I/O.......................................................................................... 44
2.16 Power and Ground Signals.................................................................................. 45
2.17 Functional Straps .............................................................................................. 46
3
Pin States................................................................................................................ 47
3.1
3.2
Pin Reset States................................................................................................ 47
Integrated Termination Resistors......................................................................... 53
4
5
System Clock Domains............................................................................................. 55
Register and Memory Mapping................................................................................. 57
5.1
5.2
Intel® SCH Register Introduction ........................................................................ 58
PCI Configuration Map ....................................................................................... 59
Datasheet
3
INTEL [ INTEL ]
