Intel® HD Audio (D27:F0)
10.2.38 VC0CTL—VC0 Resource Control Register
Address Offset:
Default Value:
114h–117h
800000FFh
Attribute:
Size:
R/W, RO
32 bits
Default
Bit
and
Description
Access
1
RO
31
30:8
7:0
VC0 Enable: Hardwired to 1 for VC0.
0
RO
Reserved
FFh
R/W, RO
TC/VC0 Map: Bit 0 is hardwired to 1 since TC0 is always mapped VC0.
Bits [7:1] are implemented as R/W bits.
10.2.39 VCSTS—VC0 Resource Status Register
Address Offset:
Default Value:
11Ah-10Bh
0000h
Attribute:
Size:
RO
16 Bits
Default
Bit
and
Description
Access
0
RO
16:0
Reserved
10.2.40 VC0CAP—VC0 Resource Capability Register
Address Offset:
Default Value:
11Ch-10Fh
00000000h
Attribute:
Size:
RO
32 Bits
Default
Bit
and
Description
Access
0
RO
31:0
Reserved
Datasheet
137
INTEL [ INTEL ]
