Intel® HD Audio (D27:F0)
10.2.29 DEVC—Device Control Register
Address Offset:
Default Value:
78h–79h
0800h
Attribute:
Size:
R/W, RO
16 bits
Default
Bit
and
Description
Access
0
RO
15
Reserved
000b
RO
Max Read Request Size (MRRS): Hardwired to 000 enabling 128 B
maximum read request size.
14:12
No Snoop Enable (NSNPEN):
0 = The Intel HD Audio controller will not set the No-Snoop bit. In this
case, isochronous transfers will not use VC1 (VCi) even if it is enabled
since VC1 is never snooped. Isochronous transfers will use VC0.
1 = The Intel HD Audio controller is permitted to set the No-Snoop bit in
the Requester Attributes of a bus master transaction. In this case, VC0
or VC1 may be used for isochronous transfers.
1
R/W
11
NOTE: This bit is not reset on D3HOT to D0 transition.
0
RO
10:4
3:0
Reserved
0
R/W
Error Reporting Bits (ERB): R/W to pass PCI Express compliance test.
no functionality.
10.2.30 DEVS—Device Status Register
Address Offset:
Default Value:
7ah–7bh
0000h
Attribute:
Size:
RO, R/W
16 bits
Default
Bit
and
Description
Access
0000h
RO
15:6
Reserved
Transactions Pending (TXP):
0
RO
0 = Completions for all Non-Posted Requests have been received.
1 = The Intel HD Audio controller has issued Non-Posted requests which
have not been completed.
5
00000b
R/W
4:0
Reserved
134
Datasheet
INTEL [ INTEL ]
