Integrated Graphics Device Registers (D2:F0,F1)
8.2.22
BSM—Mirror of Func0 Base of Stolen Memory
B/D/F/Type:
Address Offset:
Default Value:
Access:
0/2/1/PCI
5C–5Fh
07800000h
RO
Size:
32 bits
Graphics Stolen Memory and TSEG are within DRAM space defined under TOLUD.
From the top of low used DRAM, GMCH claims 1 to 64 MBs of DRAM for internal
graphics if enabled.
The base of stolen memory will always be below 4 GB. This is required to prevent
aliasing between stolen range and the reclaim region.
Bit
Access &
Default
Description
31:20
RO
078h
Base of Stolen Memory (BSM): This register contains bits 31:20 of
the base address of stolen DRAM memory. The host interface
determines the base of Graphics Stolen memory by subtracting the
graphics stolen memory size from TOLUD. See Device 0 TOLUD for
more explanation.
19:0
RO
Reserved
00000h
8.2.23
HSRW—Mirror of Dev2 Func0 Hardware Scratch Read
Write
B/D/F/Type:
Address Offset:
Default Value:
Access:
0/2/1/PCI
60–61h
0000h
RO
Size:
16 bits
Bit
Access &
Default
Description
15:0
RO
Reserved
0000h
262
Datasheet
INTEL [ INTEL ]
