Debug and Logic Analyzer Mode
Figure 5-6. EVBus Overview
EV Bus System Topology
bus to
other LAI
Local
Events
Output
Filter
“1”ENB
EVBus
Event
Select
pin
EVBus
Local
Event
Input
Filter
Each lane in the bus can be selected by the EVTYPE parameter to be a pulse (trigger)
event or a level (qualifier) event. Timing for the input and output filters is set by the
EVT parameter which defines the Tmin in core clock cycles. Both of these parameters
reside in the EVBUS control register along with the local event select controls for each
lane in the bus.
Pulse mode timing:
Input: Inputs are digitally filtered to reduce spurious events from bus ringing. Once
a rising edge is detected a single one clock width pulse event is sent to the local
events. No further pulse events are permitted until the next rising edge that occurs
after the longer of either (2 * Tmin) or (T_source_event_actual + T min).
Output: An output high pulse of length Tmin or T_local event_actual (whichever is
longer) is sourced whenever triggered by the selected local event. This is followed
by an output low pulse of length Tmin. Further toggling by the selected local event
is ignored until this output sequence is complete.
Level mode timing:
Input: Once a rising edge is detected the local event is asserted and remains
asserted for Tmin or T_source_event_actual which ever is longer.
Output: An output high pulse of length Tmin or T_local event_actual (whichever is
longer) is sourced whenever triggered by the selected local event.
Figure 5-7 shows the event signal timing.
64
Intel® 6400/6402 Advanced Memory Buffer Datasheet
INTEL [ INTEL ]
