Intel® Celeron® Processor for PGA370 up to 1.40 GHz on 0.13 µ Process
Table 37. Signal Listing in Order by Pin
Number (Continued)
Table 37. Signal Listing in Order by Pin
Number (Continued)
Pin
No.
Pin
No.
Pin Name
Signal Group
Pin Name
Signal Group
E31
DEP4#
VREF
AGTL I/O
K2
VCC
CORE
Power/Other
Power/Other
AGTL I/O
E33
E35
E37
F2
0
Power/Other
AGTL I/O
K4
VREF
2
BPM1#
BP3#
K6
D24#
AGTL I/O
K32
K34
K36
L1
VCC
VCC
Vss
Power/Other
Power/Other
Power/Other
AGTL I/O
CORE
VCC
VCC
Power/Other
Power/Other
AGTL I/O
CORE
CORE
CORE
F4
F6
D32#
D13#
F8
D22#
AGTL I/O
L3
D20#
AGTL I/O
F10
F12
F14
F16
F18
F20
F22
F24
F26
F28
F30
F32
F34
F36
G1
Reserved
D27#
Reserved for future use
AGTL I/O
L5
Vss
Power/Other
Reserved for future use
APIC I/O
L33
L35
L37
M2
M4
M6
M32
M34
M36
N1
Reserved
PICD1
LINT1/NMI
Vss
VCC
Power/Other
AGTL I/O
CORE
D63#
REF1
CMOS Input
Power/Other
AGTL I/O
V
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
AGTL I/O
Vss
VCC
Vss
VCC
Vss
VCC
Vss
VCC
Vss
D11#
D3#
AGTL I/O
CORE
CORE
CORE
CORE
VCC
Power/Other
Power/Other
CMOS Input
AGTL I/O
CORE
Vss
LINT0/INTR
D2#
N3
D14#
AGTL I/O
N5
VCC
CORE
Power/Other
Reserved for future use
Reserved for future use
Reserved for future use
Power/Other
AGTL I/O
N33
N35
Q33
P2
Reserved
Reserved
Reserved
D21#
D23#
Vss
G3
AGTL I/O
G5
Power/Other
AGTL I/O
VCC
CORE
G33
G35
G37
H2
BP2#
VTT
P4
D18#
D9#
Vss
Power/Other
Power/Other
Power/Other
AGTL I/O
P6
AGTL I/O
VTT
P32
P34
P36
Q1
Power/Other
Power/Other
Power/Other
AGTL I/O
Vss
VCC
CORE
H4
D16#
D19#
Vss
H6
AGTL I/O
D12#
H32
H34
H36
J1
VCC
Vss
VCC
D7#
Power/Other
Power/Other
Power/Other
AGTL I/O
Q3
D10#
AGTL I/O
CORE
Q5
Vss
Power/Other
Power/Other
Reserved for future use
Reserved for future use
Reserved for future use
AGTL I/O
N37
Q35
Q37
R2
NCHCTRL
Reserved
Reserved
Reserved
D17#
CORE
J3
D30#
AGTL I/O
J5
VCC
Power/Other
APIC Clock Input
APIC I/O
CORE
J33
J35
J37
PICCLK
PICD0
R4
R6
VREF3
Power/Other
Power/Other
PREQ#
CMOS Input
R32
VCC
CORE
66
Datasheet