Intel StrataFlash® Wireless Memory (L18)
.
Figure 29.
Protection Register Map
0x109
128-bit Protection Register 16
(User-Programmable)
0x102
0x91
128-bit Protection Register 1
(User-Programmable)
0x8A
0x89
Lock Register 1
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
0x88
64-bit Segment
(User-Programmable)
0x85
0x84
128-Bit Protection Register 0
64-bit Segment
(Factory-Programmed)
0x81
0x80
Lock Register 0
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
13.2.1
Reading the Protection Registers
The Protection Registers can be read from within any partition’s address space. To read the
Protection Register, first issue the Read Device Identifier command at any partitions’ address to
place that partition in the Read Device Identifier state (see Section 9.2, “Device Commands” on
page 47). Next, perform a read operation at that partition’s base address plus the address offset
corresponding to the register to be read. Table 17, “Device Identifier Information” on page 77
shows the address offsets of the Protection Registers and Lock Registers. Register data is read 16
bits at a time.
Note:
If a program or erase operation occurs within the device while it is reading a Protection Register,
certain restrictions may apply. See Table 15, “Simultaneous Operation Restrictions” on page 74 for
details.
Datasheet
Intel StrataFlash® Wireless Memory (L18)
Order Number: 251902, Revision: 009
April 2005
69
INTEL [ INTEL ]
