Intel StrataFlash® Wireless Memory (L18)
Table 8.
Command Bus Cycles (Sheet 2 of 2)
First Bus Cycle
Second Bus Cycle
Addr1 Data2
Bus
Cycles
Mode
Command
Oper Addr1 Data2 Oper
Program Protection Register
Program Lock Register
2
2
Write
Write
PRA
LRA
0xC0
0xC0
Write PRA
PD
Protection
Write LRA
Write RCD
LRD
0x03
Configuration Program Read Configuration Register
2
Write
RCD
0x60
Notes:
1.
First command cycle address should be the same as the operation’s target address.
PnA = Address within the partition.
PBA = Partition base address.
IA = Identification code address offset.
QA = CFI Query address offset.
BA = Address within the block.
WA = Word address of memory location to be written.
PRA = Protection Register address.
LRA = Lock Register address.
X = Any valid address within the device.
ID = Identifier data.
2.
QD = Query data on DQ[15:0].
SRD = Status Register data.
WD = Word data.
N = Word count of data to be loaded into the write buffer.
PD = Protection Register data.
PD = Protection Register data.
LRD = Lock Register data.
RCD = Read Configuration Register data on A[15:0]. A[MAX:16] can select any partition.
3.
4.
The second cycle of the Buffered Program Command is the word count of the data to be loaded into the write buffer. This
is followed by up to 32 words of data.Then the confirm command (0xD0) is issued, triggering the array programming
operation.
The confirm command (0xD0) is followed by the buffer data.
9.3
Command Definitions
Valid device command codes and descriptions are shown in Table 9.
Table 9.
Command Codes and Definitions (Sheet 1 of 2)
Mode
Code Device Mode
Description
0xFF Read Array
Places the addressed partition in Read Array mode. Array data is output on DQ[15:0].
Places the addressed partition in Read Status Register mode. The partition enters this
mode after a program or erase command is issued. Status Register data is output on
DQ[7:0].
Read Status
0x70
Register
Read Device
ID or
Configuration
Register
Places the addressed partition in Read Device Identifier mode. Subsequent reads from
addresses within the partition outputs manufacturer/device codes, Configuration Register
data, Block Lock status, or Protection Register data on DQ[15:0].
Read
0x90
Places the addressed partition in Read Query mode. Subsequent reads from the partition
addresses output Common Flash Interface information on DQ[7:0].
0x98 Read Query
Clear Status The WSM can only set Status Register error bits. The Clear Status Register command is
0x50
Register
used to clear the SR error bits.
April 2005
48
Intel StrataFlash® Wireless Memory (L18)
Order Number: 251902, Revision: 009
Datasheet
INTEL [ INTEL ]
