A10-DATASHEET
2015.12.31
6
Transceiver Power Supply Operating Conditions
Symbol
Description
Condition
Standard POR
Fast POR
Minimum (3)
200 µs
Typical
—
Maximum (3)
100 ms
Unit
—
—
(10)(11)
tRAMP
Power supply ramp time
200 µs
—
4 ms
Related Information
I/O Standard Specifications on page 17
Transceiver Power Supply Operating Conditions
Table 4: Transceiver Power Supply Operating Conditions for Arria 10 GX/SX Devices—Preliminary
Symbol
Description
Condition (12)
Chip-to-Chip ≤ 17.4 Gbps
Or
Minimum (13)
Typical
Maximum
Unit
1.0
1.03
1.06
V
Backplane (14) ≤ 16.0 Gbps
VCCT_GXB[L,R]
Transmitter power supply
Chip-to-Chip ≤ 11.3 Gbps
Or
0.92
0.95
0.98
V
Backplane (14) ≤ 10.3125 Gbps
(3)
This value describes the budget for the DC (static) power supply tolerance and does not include the dynamic tolerance requirements. Refer to the
PDN tool for the additional budget for the dynamic tolerance requirements.
(10)
This is also applicable to HPS power supply. For HPS power supply, refer to tRAMP specifications for standard POR when HPS_PORSEL = 0 and
tRAMP specifications for fast POR when HPS_PORSEL = 1.
(11)
(12)
tramp is the ramp time of each individual power supply, not the ramp time of all combined power supplies.
These data rate ranges vary depending on the transceiver speed grade. Refer to Transceiver Performance for Arria 10 GX/SX Devices for exact data
rate ranges.
This value describes the budget for the DC (static) power supply tolerance and does not include the dynamic tolerance requirements. Refer to the
PDN tool for the additional budget for the dynamic tolerance requirements.
Backplane applications assume advanced equalization circuitry, such as decision feedback equalization (DFE), is enabled to compensate for signal
impairments. Chip-to-chip links are assumed to be applications with short reach channels that do not require DFE.
(13)
(14)
Arria 10 Device Datasheet
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