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10AX032E3F29I2SG 参数 Datasheet PDF下载

10AX032E3F29I2SG图片预览
型号: 10AX032E3F29I2SG
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 320000-Cell, CMOS, PBGA780, 29 X 29 MM, ROHS COMPLIANT, FBGA-780]
分类和应用: 可编程逻辑
文件页数/大小: 110 页 / 1391 K
品牌: INTEL [ INTEL ]
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A10-DATASHEET  
2015.12.31  
3
Maximum Allowed Overshoot and Undershoot Voltage  
Symbol  
Description  
HPS I/O pre-driver power supply  
HPS PLL power supply  
Condition  
Minimum  
–0.50  
–0.50  
–25  
Maximum  
2.46  
Unit  
V
VCCIOREF_HPS  
VCCPLL_HPS  
IOUT  
2.46  
V
DC output current per pin  
25  
mA  
°C  
°C  
TJ  
Operating junction temperature  
Storage temperature (no bias)  
–55  
125  
TSTG  
–65  
150  
Maximum Allowed Overshoot and Undershoot Voltage  
During transitions, input signals may overshoot to the voltage listed in the following table and undershoot to –2.0 V for input currents less than  
100 mA and periods shorter than 20 ns.  
The maximum allowed overshoot duration is specified as a percentage of high time over the lifetime of the device. A DC signal is equivalent to  
100% duty cycle.  
For example, a signal that overshoots to 2.70 V for LVDS I/O can only be at 2.70 V for ~4% over the lifetime of the device.  
Table 2: Maximum Allowed Overshoot During Transitions for Arria 10 Devices—Preliminary  
This table lists the maximum allowed input overshoot voltage and the duration of the overshoot voltage as a percentage of device lifetime. The LVDS I/O  
values are applicable to the VREFP_ADCand VREFN_ADCI/O pins.  
Condition (V)  
Symbol  
Description  
Overshoot Duration as % at TJ = 100°C  
Unit  
LVDS I/O (2)  
2.50  
3 V I/O  
3.80  
100  
%
%
%
%
%
%
2.55  
3.85  
42  
2.60  
3.90  
18  
Vi (AC)  
AC input voltage  
2.65  
3.95  
9
2.70  
4.00  
4
> 2.70  
> 4.00  
No overshoot allowed  
(2)  
The LVDS I/O values are applicable to all dedicated and dual-function configuration I/Os.  
Arria 10 Device Datasheet  
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Altera Corporation