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10AS066K4F40E3SG 参数 Datasheet PDF下载

10AS066K4F40E3SG图片预览
型号: 10AS066K4F40E3SG
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 660000-Cell, CMOS, PBGA1517, 40 X 40 MM, ROHS COMPLIANT, FBGA-1517]
分类和应用: 可编程逻辑
文件页数/大小: 110 页 / 1391 K
品牌: INTEL [ INTEL ]
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A10-DATASHEET  
2015.12.31  
102  
Document Revision History  
Date  
Version  
Changes  
Updated PS Timing Parameters for Arria 10 Devices table.  
Updated the maximum value for tSTATUS and tCF2ST1 from 1,506 μs to 3,000 μs  
Updated the minimum value for tCF2CK from 1,506 μs to 3,010 μs.  
Updated the minimum value for tST2CK from 2 μs to 10 μs.  
Updated the maximum value for tCD2UM from 437 μs to 830 μs.  
Added description about .rbf and .rpd files in the Configuration Files section. Changed the table title from  
"Uncompressed Uncompressed .rbf Sizes Sizes for Arria 10 Devices" to "Configuration Bit Stream Sizes for  
Arria 10 Devices".  
Updated the note to Active Serial in Minimum Configuration Time Estimation for Arria 10 Devices table.  
Note: The minimum configuration time is calculated based on DCLK frequency of 100 MHz. Only external  
CLKUSRmay guarantee the frequency accuracy of 100 MHz. If you use internal oscillator of 100 MHz, you  
may not get the actual frequency of 100 MHz. For the DCLK frequency using internal oscillator, refer to the  
DCLK Frequency Specification in the AS Configuration Scheme table.  
Changed instances of Quartus II to Quartus Prime.  
Changed voltages and conditions in the "Transceiver Power Supply Operating Conditions for Arria 10 GX/  
SX Devices" table.  
Changed maximum data rate conditions in the "Transmitter and Receiver Data Rate Performance" table.  
Changed conditions in the "Transmitter and Receiver Data Rate Performance" table in the Transceiver  
Performance for Arria 10 GT Devices section.  
Changed conditions in the "Reference Clock Specifications" table.  
Changed the clock networks in the "Transceiver Clock Network Maximum Data Rate Specifications" table.  
Changed conditions in the "Receiver Specifications" table.  
Changed conditions in the "Transmitter Specifications" table.  
Changed the minimum frequeny in the "ATX PLL Performance," "Fractional PLL Performance," and "CMU  
PLL Performance" tables in the Transceiver Performance for Arria 10 GX/SX Devices section.  
Changed the minimum frequeny in the "ATX PLL Performance," "Fractional PLL Performance," and "CMU  
PLL Performance" tables in the Transceiver Performance for Arria 10 GT Devices section.  
Added a parameter to the "Reference Clock Specifications" table.  
Added footnote to the "Transmitter Specifications" table.  
Arria 10 Device Datasheet  
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Altera Corporation  
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