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IA88C00 参数 Datasheet PDF下载

IA88C00图片预览
型号: IA88C00
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器 [Microcontroller]
分类和应用: 微控制器
文件页数/大小: 80 页 / 674 K
品牌: INNOVASIC [ INNOVASIC, INC ]
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IA88C00  
Data Sheet  
Microcontroller  
As of Production Version -01  
Pins  
The UART uses the following Port 2 and 3 pins:  
Figure 61. Port 2 and 3 Pins  
Port/Pin  
2/0  
UART Function  
Receive Clock  
3/0  
2/1  
3/1  
Receive Data  
Transmit Clock  
Transmit Data  
Transmitter  
Data is output on the UART when the UART’s register is specified as the destination (dst) of an  
operation. This automatically adds the start bit, the programmed parity bit and the programmed number of  
stop bits. It can also add a wake-up bit if that option is selected.  
The extra bits in R239 are ignored if the UART is programmed to a 5-, 6-, or 7-bit character.  
Depending on the programmed data rate, serial data is transmitted at a rate equal to 1, 1\16, 1\32 or 1\64  
of the transmitter clock rate. All data is sent out on the falling edge of the clock input.  
When the UART has no data to send, it holds the output marking (High). It can be programmed with the  
Send Break command to hold the output marking Low (Spacing). This output marking continues until the  
command is cleared.  
Receiver  
The UART begins receive operation when Receive Enable (URC, bit 0) is set to High. After this, a Low  
on the receive input pin for longer than half a bit time is interpreted as a start bit. The UART samples the  
data on the input pin in the middle of each clock cycle until a complete byte is assembled. This completed  
byte is placed in the Receive Data register.  
If the 1X clock mode is selected, external bit synchronization must be provided, and the input data is  
sampled on the rising edge of the clock.  
For character lengths of less than eight bits, the UART inserts 1s into the unused bits. And if parity is  
enabled, the parity bit is not stripped. The data bits, extra 1s and the parity bits are placed in the UART  
Data register (UIO).  
While the UART is assembling a byte in its input shift register, the CPU has time to service an interrupt  
and manipulate the data character in UIO.  
Copyright 2005  
Innovasic.com  
Innovasic Semiconductor  
ENG21 1 030617-04  
Page 63 of 80  
www.Innovasic  
1.888.824.4184  
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