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IA82527PLC44AR2 参数 Datasheet PDF下载

IA82527PLC44AR2图片预览
型号: IA82527PLC44AR2
PDF下载: 下载PDF文件 查看货源
内容描述: 串行通信Controllerâ ???? CAN协议 [Serial Communications Controller—CAN Protocol]
分类和应用: 外围集成电路局域网通信时钟
文件页数/大小: 58 页 / 1454 K
品牌: INNOVASIC [ INNOVASIC, INC ]
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IA82527  
Data Sheet  
CAN Serial Communications Controller  
December 20, 2012  
4.1.3 I/O Ports  
The IA82527 contains two 8-bit General Purpose Input Output (GPIO) ports. Each GPIO port is  
selectable or programmable as either an input or an output. CPU interface modes may use some  
of the GPIO pins or signals, precluding their use as GPIO. Six bits of GPIO Port 2 (p2.5 to p2.0)  
are always available as GPIO. GPIO Port 2 bits 6 and 7 (p2.6 and p2.7) have alternate functions  
as the alternate source for int_n and as the wrh_n input for CPU mode 2 and may be available as  
GPIO depending on the CPU mode. GPIO Port 1 is available for use as GPIO in CPU  
modes 0, 2, and SPI and is not available in CPU modes 1 and 3.  
4.1.4 Programmable Clock Output  
Using an oscillator, clock divider register, and a driver circuit, the IA82527 provides a  
programmable clock output. The output frequency range available is from the external crystal  
frequency to that frequency divided by 15. The clock output allows the IA82527 to drive other  
devices such as the host CPU. The slew rate of the clkout signal is selectable via the CLKOUT  
Register (1FH).  
4.2  
Address Map  
The IA82527 includes 256 8-bit locations that provide device configuration registers and  
message storage. The address map is shown in Table 8.  
4.3  
CAN Message Objects  
Each CAN message object has a unique identifier and can be configured as either transmit or  
receive, except for message object 15. Message object 15 is a double-buffered receive-only  
buffer with a special mask design to allow select groups of different message identifiers to be  
received. Each message object contains registers for control and status bits.  
All message objects have separate transmit and receive interrupts and status bits that allow the  
host CPU to determine when a message frame has been sent or received. The IA82527  
implements a global masking feature that allows the user to globally mask any identifier bits of  
the incoming message. This mask is programmable, which permits application-specific message  
identification.  
The Message Object Structure is shown in Table 9.  
IA211080504-07  
http://www.innovasic.com  
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