IA6805E2
29 August 2007
Microprocessor Unit
As of Production Version 00
I/O Pin Functions
R/W-n DDR
I/O Pin Functions
0
0
The I/O pin is in input mode. Data is
written into the output data latch.
0
1
Data is written into the output data latch and
output to the I/O pin.
1
1
0
1
The state of the I/O pin is read.
the I/O pin is in an output mode. The
output data latch is read.
I/O Port Circuitry and Register Configuration:
DATA DIRECTION
REGISTER
BIT
TO
AND
LATCHED
I/O
PIN
OUTPUT
DATA BIT
OUTPUT
FROM
CPU
INPUT
REG
BIT
INPUT
I/O
PIN
7
6
5
4
3
2
1
0
DATA DIRECTION
A(B)
REGISTER
DDA7
DDA6
DDA5
DDA4
DDA3
DDA2
DDA1
DDA0
$0004 ($0005)
$0000 ($0001)
(DDB7) (DDB6) (DDB5) (DDB4) (DDB3) (DDB2) (DDB1) (DDB0)
PORT A(B)
REGISTER
PA7
(PB7)
PA6
(PB6)
PA5
(PB5)
PA4
(PB4)
PA3
(PB3)
PA2
(PB2)
PA1
(PB1)
PA0
(PB0)
PIN
Figure 2. PA0-PA7/PB0-PB7 (Input/Output Lines)
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IA211081401-03
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