IA21140AF
Preliminary Data Sheet
PCI FAST ETHERNET LAN CONTROLLER
AC Characteristics
PCI Clock:
Timing Diagram
Thigh
2.0 V
5.0 V Clock
3.3 V Clock
Tlow
0.8 V
Tr Tf
0.475 * vdd clamp
0.325 * vdd clamp
Tcycle
PCI Clock Specification Timing Characteristics
Symbol
Tcycle
Thigh
Tlow
Tr
Parameter
Min
30
11
11
1
Max
Unit
Cycle time
50
-
ns
ns
pci_clk high time
pci_clk low time
pci_clk slew rate
pci_clk slew rate
-
ns
4
4
V/ns
V/ns
Tf
1
Copyright 2001
innovASIC
ENG210010110-00
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