IA21140AF
Preliminary Data Sheet
PCI FAST ETHERNET LAN CONTROLLER
MII/SYM Port Timing Waveforms:
Transmit:
Timing Diagram
Tcc
Tcf
Tcl
Tcr
Tch
Trv
mii_sym_tclk
mii_sym_txd[3:0]
mii_sym_txen
Trh
Timing Characteristics
Symbol
Tcc
Definition
Min* Typ* Max*
Units
ns
-
40t
-
-
26t
26t
-
mii_sym_tclk cycle time (±50 ppm)
mii_sym_tclk high time
mii_sym_tclk low time
Tch
Tcl
14t
ns
14t
-
ns
Tcr
mii_sym_tclk rise time
-
-
-
8
8
-
ns
Tcf
mii_sym_tclk fall time
-
ns
Trv
mii_ tclk rise to mii_txen valid time or
mii_sym_tclk rise to mii_sym_txd valid time
20
ns
Trh
mii_txen hold after mii_tclk rise time
5
-
-
ns
·
t = 1 for 100 Mbps operation and t = 10 for 10 Mbps operation.
Copyright 2001
innovASIC
ENG210010110-00
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