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IA16450
Preliminary Data Sheet
Universal Asynchronous Receiver/Transmitter
Timing Waveforms
Figure 2
Write Cycle
tADS
ADS_n
tAS
tAH
A2,A1,A0
CS2_n,CS1,CS0
CSOUT
VALID
tCS
tCH
tWA
VALID
tCSC
tWCS
tCSW
tAW
tWR
ACTIVE
tDS
tWC
WC
ACTIVE
ACTIVE
WR_n,WR
RD_n,RD
tDH
DATA,D0:D7
VALID DATA
Read Cycle
tADS
ADS_N
A2,A1,A0
tAS
tAH
tRA
VALID
tCS
tCH
tRCS
CS2_n,CS1,CS0
CSOUT
VALID
tCSC
tCSR
tAR
RC
tRD
tRC
ACTIVE
ACTIVE
RD_n,RD
ACTIVE
WR_n,WR
tRDD
tRDD
DDIS
tRVD
tHZ
DATA,D0:D7
VALID DATA
Copyright ã 1999, InnovASIC Inc.
Customer Specific IC Solutions