Page 7 of 10
IA16450
Preliminary Data Sheet
Universal Asynchronous Receiver/Transmitter
AC Electrical Characteristics
Table 3
Symbol
tADS
tAH
Parameter
Min
25
0
Max
Address Strobe Width
Address Hold Time
tAR
RD, RD_n Delay from Address (Note 1)
Address Setup Time
20
25
20
0
tAS
tAW
WR, WR_n Delay from Address (Note 1)
Chip Select Hold Time
tCH
tCS
Chip Select Setup Time
25
tCSC
tCSR
tCSW
tDH
Chip Select Output Delay from Select (Note 1)
RD, RD_n Delay fron Select (Note 1)
WR, WR_n Delay fron Select (Note 1)
Data Hold Time
33
25
20
20
10
20
0
tDS
Data Setup Time
tHZ
RD, RD_n to Floating Data Delay
Address Hold Time from RD, RD_n (Note 1)
Read Cycle Delay
tRA
0
tRC
36
0
tRCS
tRD
Chip Select Hold Time from RD, RD_n (Note 1)
RD, RD_n Strobe Width
60
tRDD
tRVD
tWA
RD, RD_n to Driver Disable Delay
Delay from RD, RD_n to Data
Address Hold Time from WR, WR_n
Write Cycle Delay
20
31
0
tWC
tWCS
tWR
RC
WC
36
0
Chip Select Hold Time from WR, WR_n (Note 1)
WR, WR_n Strobe Width
60
115
115
Read Cycle = tAR + tRD+ tRC
Write Cycle = tAW + tWR+tWC
Note 1:
Applicable only when ADS_n is tied low.
Copyright ã 1999, InnovASIC Inc.
Customer Specific IC Solutions
INNOVASIC [ INNOVASIC, INC ]
