fido2100 3-Port Industrial Ethernet DLR Switch with IEEE1588
Data Sheet
April 10, 2013
2.1 IEEE 802.3 MAC Details
The fido2100 implements an IEEE 802.3 standard compliant MAC for each of the three ports. While
beginning a transmission, the MAC will transmit 7 bytes of preamble pattern 0x55, followed by one
byte of start of frame delimiter 0xD5, followed by the frame data and frame check sequence as per
IEEE 802.3 specification.
While transmitting, the MAC will enforce an inter-frame gap period of 960 ns at 100Mbps speed and
9.6 ns at 10Mbps speed as per IEEE 802.3 specification. While receiving, the MAC can tolerate
shrinkage of the inter-frame gap period down to 80 nanoseconds at 100Mbps speed and 800
nanoseconds at 10Mbps speed.
In full duplex mode the MAC will ignore carrier sense and collision detect signals from the PHY and is
ready to transmit after satisfying the inter-frame gap period as per IEEE 802.3 specification. In half
duplex mode, the MAC will wait for the current transmission to complete and the carrier sense signal to
be de-asserted. Then it will monitor if the carrier sense signal gets asserted in the first 2/3 duration of
the inter-frame gap period. If the carrier signal gets asserted within that period, the MAC will wait until
the carrier sense signal gets de-asserted to restart inter-frame gap period again. If the carrier sense
signal gets asserted in the last 1/3 duration of the inter-frame gap it will be ignored as per the IEEE
802.3 specification. The MAC is ready for transmission at the end of the inter-frame gap period. If a
frame is not available for transmission at the end of the inter-frame gap, the carrier sense signal will be
monitored for restarting inter-frame gap period.
If the frame transmission has commenced in half duplex mode and the collision signal gets asserted by
the PHY, transmission of the current frame data will be truncated with a jam pattern of 4 bytes of 0xFF.
At this point the collision back off and retransmission procedure will start using the truncated binary
exponential back off algorithm as per IEEE 802.3 specification. At the end of enforcing a jamming
pattern, the MAC will impose a delay before attempting to retransmit the frame. The delay is an integer
multiple of a slot time, where one slot time is equal to 512 bits time. The number of slot times to delay
th
before the n retransmission attempt is chosen as a uniformly distributed random integer r in the range:
k
0 ≤ r < 2 ; where k = min (n, 10)
If sixteen transmission attempts fail with collision for the same frame, the frame will be dropped as per
IEEE 802.3 specification. The mechanism used to generate the uniformly distributed random number is
a free running 10 bit wide linear feedback shift register (LFSR). The LFSR will cycle through all states
in 1024 transmit clocks of the port under consideration. Depending on the retransmission attempt
number n, the most significant k bits of LFSR are used as delay integer r. Due to the free running
nature of the LFSR, lock step random number generation in two different devices should not occur.
However, a facility is provided whereby the firmware can load a random seed value into the LFSR
anytime during operation.
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