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AM188EM-20VIW 参数 Datasheet PDF下载

AM188EM-20VIW图片预览
型号: AM188EM-20VIW
PDF下载: 下载PDF文件 查看货源
内容描述: 8位/ 16位微控制器 [8-Bit/16-Bit Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 146 页 / 1574 K
品牌: INNOVASIC [ INNOVASIC, INC ]
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IA186EM/IA188EM  
Data Sheet  
8-Bit/16-Bit Microcontrollers  
February 25, 2011  
Table 77. Synchronous Serial Transmit Registers  
15 14 13 12 11 10  
Reserved  
9
8
7
6
5
4
3
2
1
0
SD7SD0  
Bits [158]Reserved.  
Bits [70]SD7SD0 Data to be transmitted over the SDATA pin.  
5.1.56 SSC (012h)  
Synchronous Serial Control Register. This register controls the operation of the sden1 and sden0  
outputs and the baud rate of the SSI port. The sden1 and sden0 outputs are held high when the  
respective bit is set to 1, but in the event that both DE1 and DE0 are set to 1 then only sden0 will  
be held high. The value of the SSR register is 0000h at reset (see Table 78).  
Table 78. Synchronous Serial Control Registers  
15 14 13 12 11 10  
Reserved  
9
8
7
6
5
4
3
2
1
0
SCLKDIV Reserved DE1 DE0  
Bits [156]Reserved.  
Bits [54]SCLKDIV SCLK Divide These bits set the SCLK frequency. SCLK is  
the result of dividing the internal processor clock by 2, 4, 8, or 16 as shown below.  
SCLKDIV SCLK Frequency Divider  
00b  
01b  
10b  
11b  
Processor Clock/2  
Processor Clock/4  
Processor Clock/8  
Processor Clock/16  
Bits [32]Reserved.  
Bit [1]DE1 SDEN1 The SDEN1 bit is held high when this bit is set to 1 and SDEN1  
is held low when this bit is set to 0.  
Bit [0]DE0 SDEN0 The SDEN0 bit is held high when this bit is set to 1 and SDEN0  
is held low when this bit is set to 0.  
5.1.57 SSS (010h)  
Synchronous Serial Status Register. This is a read-only register that indicates the state of the SSI  
port. The value of the SSR register is 0000h at reset (see Table 79).  
®
IA211050831-19  
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Customer Support:  
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