IA186ES/IA188ES
Data Sheet
8-Bit/16-Bit Microcontrollers
November 15, 2011
Table 85. Software Halt Cycle Timing
a
a
No.
Name
Description
Min
Max
General Timing Responses
3
4
7
8
9
tCHSV
tCLSH
tCLDV
tCHDX
tCHLH
Status Active Delay
Status Inactive Delay
Data Valid Delay
Status Hold Time
0
0
0
0
0
6
6
12
–
ale Active Delay
8
10 tLHLL
ale Width
tCLCH-5
–
11 tCHLL
12 tAVLL
ale Inactive Delay
0
8
–
ad Address Valid to ale Low
ad Address Float Delay
mcs_n/pcs_n Inactive Delay
mcs_n/pcs_n Hold from Command Inactive
mcs_n/pcs_n Inactive Delay
den_n Inactive to dt/r_n Low
Control Active Delay 1
den_n Inactive Delay
Control Active Delay 2
ale High to Address Valid
Control Inactive Delay
clkouta High to a Address Valid
tCLCH
15 tCLAZ
16 tCLCSV
17 tCXCSX
18 tCHCSX
19 tDXDL
20 tCVCTV
21 tCVDEX
22 tCHCTV
23 tLHAV
31 tCVCTX
68 tCHAV
0
0
12
12
–
12
–
10
9
10
–
tCLCH
0
0
0
0
0
7.5
0
0
10
8
a
In nanoseconds.
®
IA211050902-19
UNCONTROLLED WHEN PRINTED OR COPIED
http://www.innovasic.com
Customer Support:
Page 127 of 154
1-888-824-4184
INNOVASIC [ INNOVASIC, INC ]
