IA186ES/IA188ES
Data Sheet
8-Bit/16-Bit Microcontrollers
November 15, 2011
Table 87. Ready and Peripheral Timing
a
a
No.
Name
Description
Min
Max
Ready and Peripheral Timing Requirements
47 tSRYCL
48 tCLSRY
49 tARYCH
50 tCLARX
51 tARYCHL
52 tARYLCL
53 tINVCH
54 tINVCL
srdy Transition Setup Time
srdy Transition Hold Time
ardy Resolution Transition Setup Time
ardy Active Hold Time
ardy Inactive Holding Time
ardy Setup Time
10
3
9
4
6
9
10
10
–
–
–
–
–
–
–
–
Peripheral Setup Time
drq Setup Time
Peripheral Timing Responses
55 tCLTMV
Timer Output Delay
0
12
a
In nanoseconds.
0ns
20ns
40ns
60ns
57
80ns
100ns
120ns
140ns
160ns
x1
x1
57
res_n
res_n
Low for N x1 Cycles
clkouta
Figure 26. Reset 1
0ns
20ns
40ns
60ns
80ns
100ns
120ns 140ns
tri-state
160ns
res_nn
clkoutaA
rfsh_n/aden_n,
2
s6, uzi_na/ed,s6uzi_n
ad15–ad0 (IA186ES),
ao15–ao8 (IA188ES),
ad7–ad0 (IA188ES)
tri-state
Figure 27. Reset 2
®
IA211050902-19
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