XC2287 / XC2286 / XC2285
XC2000 Family Derivatives
Preliminary
Electrical Parameters
Sample time and conversion time of the XC228x’s A/D Converters are programmable.
The above timing can be calculated using Table 16.
The limit values for fADCI must not be exceeded when selecting the prescaler value.
Table 16
A/D Converter Computation Table
GLOBCTR.5-0
(DIVA)
A/D Converter
Basic Clock fADCI
INPCRx.7-0
(STC)
Sample Time
tS
000000B
000001B
000010B
:
fSYS
00H
01H
02H
:
tADCI × 2
f
f
f
f
f
SYS / 2
tADCI × 3
SYS / 3
tADCI × 4
SYS / (DIVA+1)
SYS / 63
tADCI × (STC+2)
tADCI × 256
tADCI × 257
111110B
111111B
FEH
FFH
SYS / 64
Converter Timing Example:
Assumptions:
Basic clock
fSYS = 66 MHz (i.e. tSYS = 15.2 ns), DIVA = 03H, STC = 00H
fADCI = fSYS / 4 = 16.5 MHz, i.e. tADCI = 60.6 ns
Sample time
tS
= tADCI × 2 = 121 ns
Conversion 10-bit:
tC10 = 17 × tADCI = 17 × 60.6 ns = 1.03 µs
Conversion 8-bit:
tC8
= 15 × tADCI = 15 × 60.6 ns = 0.91 µs
Converter Timing Example:
Assumptions:
Basic clock
fSYS = 40 MHz (i.e. tSYS = 25 ns), DIVA = 02H, STC = 03H
fADCI = fSYS / 3 = 13.3 MHz, i.e. tADCI = 75 ns
tS = tADCI × 5 = 375 ns
Sample time
Conversion 10-bit:
tC10 = 20 × tADCI = 20 × 75 ns = 1.5 µs
Conversion 8-bit:
tC8
= 18 × tADCI = 18 × 75 ns = 1.35 µs
Data Sheet
86
V0.91, 2007-02
Draft Version
INFINEON [ Infineon ]
