TLD7002-16ES
Datasheet
5 General Purpose Input (GPI)
Table 6
(continued) Application example
GPIN0 (tail light)
GPIN1 (stop light)
Output duty cycle
High
High
100ꢀ
The device resolves duty cycle request conflicts between GPIN activation and HSLI activation according to following
table:
Table 7
GPIN priority configuration
Output
mapped to
GPIN
GPIN
GPINn_WRN
HSLI_WDT
Priority configuration
no
–
–
not triggered HSLI
no
–
–
triggered
disabled
Fail-safe (OTP)
HSLI
no
–
–
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
static low
static low
static low
static high
PWM low
PWM low
PWM low
PWM high
–
not triggered HSLI
–
triggered
disabled
–
Fail-safe (OTP)
–
GPIN, output OFF
GPIN, output ON
–
no
no
no
no
not triggered HSLI
triggered
disabled
–
Fail-safe (OTP)
GPIN, output OFF
GPIN, output ON
PWM low/high yes
PWM low/high yes
PWM low/high yes
not triggered HSLI
triggered
disabled
Fail-safe (OTP)
Fail-safe (OTP)
Note: In case of a transition from GPIN control back to HSLI control a DC_SYNC frame is needed to synchronize to the last
configured duty cycle.
5.4
Output enable
The GPIN0 enables or disables all power output stages if the ouput enable (OE) feature is configured via the OTP.
The output power stages are enabled if the GPIN0="high", disabled if the GPIN0="low".
A "high" state is when VGPIN0 ≥ VIH OR as in case of a PWM encoding as described in Chapter 5.6.
A "low" state is when VGPIN0 ≤ VIL OR as in case of a PWM encoding as described in Chapter 5.6.
The output enable function is not effective for
•
•
OUT15, when used as ERRn
OUT0, when used as DCDC feedback channel.
5.5
Analog input
The GPINs can be configured with the OTP as analog input pins for external voltage measurements, (e.g. for external
NTC/PTC temperature measurements).
The pull-down function is disabled in case the GPINn is configured as analog input pin.
Datasheet
22
Rev.1.00
2022-05-03
INFINEON [ Infineon ]
