TDA 5210
Applications
4.1 Choice of LNA Threshold Voltage and Time Constant
In the following figure the internal circuitry of the LNA automatic gain control is
shown.
R1
R2
U
th re s h old
23
Pins:
24
RSSI (0.8 - 2.8V)
20kΩ
OTA
VCC
+3.1V
I
LNA
load
Gain control
voltage
RSSI > Uthres hold: Iload=4.2µA
RSSI < Uthres hold: Iload= -1.5µA
4
Uc :< 2.6V : Gain high
Uc :> 2.6V : Gain low
UC
C
Uc max = VCC - 0.7V
Uc min = 1.67V
LNA_autom.wmf
Figure 4-1
LNA Automatic Gain Control Circuitry
The LNA automatic gain control circuitry consists of an operational transimped-
ance amplifier that is used to compare the received signal strength signal
(RSSI) generated by the Limiter with an externally provided threshold voltage
Uthres. As shown in the following figure the threshold voltage can have any
value between approximately 0.8 and 2.8V to provide a switching point within
the receive signal dynamic range.
This voltage Uthres is applied to the THRES pin (Pin 23) The threshold voltage
can be generated by attaching a voltage divider between the 3VOUT pin
(Pin 24) which provides a temperature stable 3V output generated from the
internal bandgap voltage and the THRES pin. If the RSSI level generated by the
Limiter is higher than Uthres, the OTA generates a positive current Iload. This
yields a voltage rise on the TAGC pin (Pin 4). Otherwise, the OTA generates a
negative current. These currents do not have the same values in order to
achieve a fast-attack and slow-release action of the AGC and are used to
charge an external capacitor which finally generates the LNA gain control volt-
age.
Wireless Components
4 - 2
Specification, May 2001
INFINEON [ Infineon ]
