TC1796
General Device Information
Table 2
Symbol Pins I/O Pad
Class Supply
I/O A1/A2 VDDP
Pin Definitions and Functions (cont’d)
Power Functions
P1
Port 1
Port 1 is a 16-bit bi-directional general-
purpose I/O port which can be alternatively
used for the MLI0 interface or as external
trigger input lines.
P1.0
P1.1
P1.2
P1.3
P3
P2
P1
N1
I
I
I
I
I
A1
A1
A1
A1
A1
REQ0
REQ1
REQ2
REQ3
External trigger input 0
External trigger input 1
External trigger input 3
External trigger input 2
TREADY0B MLI0 transmit channel
ready input B
P1.4
P1.5
P1.6
P1.7
P1.8
P1.9
P1.10
P1.11
N4
M4
N3
N2
M3
M2
M1
L4
O
I
A2
A1
A2
A2
A1
A2
A1
A1
TCLK0
MLI0 transmit channel clock
output
TREADY0A MLI0 transmit channel
ready input A
TVALID0A
TDATA0
RCLK0A
O
O
I
MLI0 transmit channel valid
output A
MLI0 transmit channel data
output
MLI0 receive channel clock
input A
O
I
RREADY0A MLI0 receive channel ready
output A
RVALID0A
MLI0 receive channel valid
input A
I
RDATA0A
MLI0 receive channel data
input A
P1.12
P1.13
P4
L3
O
I
A2
A1
SYSCLK
RCLK0B
System clock output
MLI0 receive channel clock
input B
P1.14
P1.15
L2
L1
I
I
A1
A1
RVALID0B
RDATA0B
MLI0 receive channel valid
input B
MLI0 receive channel data
input B
Data Sheet
18
V1.0, 2008-04
INFINEON [ Infineon ]
