TC1796
Electrical Parameters
4.3.8
JTAG Interface Timing
Operating Conditions apply, CL = 50 pF
Table 27
Parameter
TCK Clock Timing Parameter
Symbol
Values
Typ.
Unit Note /
Test Con
Min.
Max.
dition
TCK clock period1)
TCK high time
TCK low time
TCK clock rise time
TCK clock fall time
tTCK
t1
t2
t3
t4
.
SR 25
–
–
–
–
–
–
–
–
4
4
ns
ns
ns
ns
ns
–
–
–
–
–
SR 10
SR 10
SR –
SR –
1) fTCK should be lower or equal to fSYS
tTCK
0.9 VDD
0.1 VDD
0.5 VDDP
TCK
t4
t3
t1
t2
JTAG_TCK
Figure 36
TCK Clock Timing
Data Sheet
118
V1.0, 2008-04