TC39x BC/BD-Step
Electrical SpecificationPower Supply Current
3.12
Power Supply Current
The total power supply current defined below consists of leakage and switching components.
Application relevant values are typically lower than those given in the following table and depend on the customer's
system operating conditions (e.g. thermal connection or used application configurations).
The operating conditions for the parameters in the following table are:
The real (realistic) power pattern defines the following conditions:
•
•
•
•
•
•
•
•
•
TJ = 150 °C
f
f
f
SRI = fCPUx = 300 MHz
GTM = 200 MHz
SPB = fSTM = fBAUD1 = fBAUD2 = fASCLINx = 100 MHz
V
V
V
DD = 1.275 V
DDP3 / FLEX = 3.366 V
EXT / EVRSB = VDDM = 5.1 V
all cores are active including four lockstep cores (IPC=0.6)
the following modules are inactive: HSM, HSCT, GETH, Ethernet, PSI5, I2C, FCE, EBU, SPU, RIF, and MTU
The max power pattern defines the following conditions:
•
•
•
•
•
•
•
•
•
TJ = 150 °C
f
f
f
SRI = fCPUx = 300 MHz
GTM = 200 MHz
SPB = fSTM = fBAUD1 = fBAUD2 = fASCLINx = 100 MHz
V
V
V
DD = 1.375 V
DDP3 / FLEX = 3.63 V
EXT / EVRSB = VDDM = 5.5 V
all cores are active including four lockstep cores (IPC=1.2)
the following modules are inactive: GETH, FCE, SPU, RIF, and MTU
The ADAS power pattern defines the following conditions:
•
•
•
•
•
•
•
•
TJ = 125 °C
f
f
f
f
SRI = fCPUx = 300 MHz
GTM = 100 MHz
SPU = 300 MHz; (FFT length =2048, complex windowing)
SPB = fSTM = fBAUD1 = fBAUD2 = fASCLINx = 100 MHz
V
V
DD = 1.275 V
DDP3/EXT/FLEX/EVRSB = VDDM = 3.366 V
CPU0 and CPU1 (IPC=1.2) and CPU2 (IPC=0.6) cores are active including three lockstep cores; CPU3
(IPC=0.6) is active without lockstep core
•
•
Only EVADC0 and EVADC1 are active
the following modules are inactive: CPU4, CPU5, HSM, HSCT, GETH, PSI5, I2C, FCE, EBU, MSC, DSADC,
and MTU
Data Sheet
446
V 1.2, 2021-03
OPEN MARKET VERSION
INFINEON [ Infineon ]
