TC1767
Pinning
Table 4
Pin Definitions and Functions (PG-LQFP-176-5 Package1)) (cont’d)
Ctrl. Type Function
Pin Symbol
97
P1.11
I/O0 A2/
Port 1 General Purpose I/O Line 11
PU
IN27
I
GPTA0 Input 27
IN51
I
GPTA0 Input 51
SCLK1B
OUT27
OUT51
SCLK1B
P1.12
I
SSC1 Clock Input B
O1
GPTA0 Output 27
O2
GPTA0 Output 51
O3
SSC1 Clock Output B
73
72
71
I/O0 A1/
Port 1 General Purpose I/O Line 12
LTCA2 Input 16
PU
IN16
I
AD0EMUX0
AD0EMUX0
OUT16
P1.13
O1
ADC0 External Multiplexer Control Output 0
ADC0 External Multiplexer Control Output 0
LTCA2 Output 16
O2
O3
I/O0 A1/
Port 1 General Purpose I/O Line 13
LTCA2 Input 17
PU
IN17
I
AD0EMUX1
AD0EMUX1
OUT17
P1.14
O1
ADC0 External Multiplexer Control Output 1
ADC0 External Multiplexer Control Output 1
LTCA2 Output 17
O2
O3
I/O0 A1/
Port 1 General Purpose I/O Line 14
LTCA2 Input 18
PU
IN18
I
AD0EMUX2
AD0EMUX2
OUT18
O1
ADC0 External Multiplexer Control Output 2
ADC0 External Multiplexer Control Output 2
LTCA2 Output 18
O2
O3
117 P1.15
BRKIN
I/O0 A2/
Port 1 General Purpose I/O Line 15
Break Input
PU
I
Reserved
O1
O2
O3
O
-
Reserved
Reserved
BRKOUT
-
-
Break Output (controlled by OCDS module)
Port 2
Data Sheet
60
V1.3, 2009-09
INFINEON [ Infineon ]
