SAB 80C515/80C535
AC Characteristics (cont’d)
Parameter Symbol
Limit values
Unit
12 MHz clock
Variable clock
1/t
= 3.5 MHz to 12 MHz
CLCL
min.
max.
min.
max.
External Data Memory Characteristics
–
RD pulse width
t
t
t
t
t
t
t
t
t
t
400
400
132
–
–
6 t
6 t
2 t
–
– 100
ns
ns
ns
RLRH
WLWH
LLAX2
RLDV
RHDX
RHDZ
LLDV
CLCL
CLCL
CLCL
–
WR pulse width
–
– 100
– 35
–
Address hold after ALE
RD to valid data in
DATA hold after RD
Data float after RD
ALE to valid data in
Address to valid data in
ALE to WR or RD
–
252
–
5 t
– 165 ns
CLCL
0
0
–
–
–
ns
ns
–
97
2 t
8 t
9 t
3 t
– 70
CLCL
CLCL
CLCL
CLCL
–
517
585
300
123
– 150 ns
– 165 ns
–
AVDV
LLWL
WHLH
200
43
3 t
– 50
+ 50
+ 40
ns
ns
CLCL
CLCL
CLCL
WR or RD high to ALE
high
t
– 40
t
CLCL
CLCL
Address valid to WR
t
t
203
33
–
–
4 t
– 130
–
–
ns
ns
AVWL
QVWX
Data valid to WR
transition
t
– 50
CLCL
Data setup before WR
Data hold after WR
t
t
t
288
13
–
–
–
0
7 t
– 150
– 50
–
–
0
ns
ns
ns
QVWH
WHQX
RLAZ
t
CLCL
Address float after RD
–
Semiconductor Group
41
INFINEON [ Infineon ]
