Functional Description
TE Timing Mode (SPM=0)
The frame is composed of three channels (figure 29):
* Channel 0 contains 144 kbit/s (for 2B+D) plus MONITOR and Command/Indication
channels for the layer-1 device.
* Channel 1 contains two 64-kbit/s intercommunication channels plus MONITOR and
Command/Indication channels for other IOM-2 devices.
* Channel 2 is used for IOM bus arbitration (access to the TIC bus). Only the Command/
Indication bits are used in channel 2. See section 2.4.6 for details.
125 µs
FSC1
IOM R -2 CH0
IOM R -2 CH1
IOM R -2 CH2
IPD0
(DD)
B1
B1
B2
MON0 D CI0
IC1
MX
IC2
MON1 CI1
MR
MR
MX
MX
S/G
A/B
IPD1
(DU)
B2
MON0 D CI0
MR
IC1
MX
IC2
MON1 CI1
MR
BAC
TAD
SDS1/2
ITD05968
Figure 29
Definition of IOM®-2 Channels in Terminal Timing Mode
The IOM-2 signals are:
IDP0, 1
DCL
FSC1
:
768 kbit/s (IDP0 = Data downstream (DD); IDP1 = Data upstream (DU))
: 1536 kHz output
8 kHz output.
:
In addition, to support standard combos/data devices the following signals are generated as
outputs:
BCL
SDS1/2
: 768 kHz bit clock
8 kHz programmable data strobe signals for selecting one or both B/IC
channel(s).
:
Important Note: If the ISAC-S is configured in NT mode, the IOM frame structure is identical
to that of the IOM-1 case.
Semiconductor Group
60
INFINEON [ Infineon ]
