Functional Description
Terminal Mode (SPM=0)
In this case the IOM has the 12-byte frame structure consisting of channels 0, 1 and 2 (see
figure 29):
– IDP0 carries the 2B+D channels from the S/T interface, and the MONITOR 0 and C/I 0
channels coming from the S/T controller;
– IDP1 carries the MONITOR 0 and C/I 0 channels to the layer-1.
Channel 1 of the IOM interface is used for internal communication in terminal applications. Two
cases have to be distinguished, according to whether the ISAC-S is operated as a master
device (communication with slave devices via MONITOR 1 and C/I 1), or as a slave device
(communication with one master via MONITOR 1 and C/I 1).
If IDC is set to "0" (Master Mode):
– IDP0 carries the MONITOR 1 and C/I 1 channels as output to peripheral (voice/data)
devices;
– IDP0 carries the IC channels as output to other devices, if programmed (C×C1 – 0 = 01 in
register SPCR).
If IDC is set to "1" (Slave Mode):
– IDP1 carries the MONITOR 1 and C/I 1 channels as output to a master device;
– IDP0 carries the IC channels as output to other devices, if programmed (C×C1 – 0 = 01 in
register SPCR).
If required (cf. DIM2-0, MODE register), bit 5 of the last byte in channel 2 on IDP0 is used to
indicate the S bus state (Stop/Go bit) and bits 2 to 5 of the last byte are used for TIC bus access
arbitration (see chapter 2.4.6).
Figure 33 shows the connection in a multifunctional terminal with the ISAC-S as a master
(figure 33b) and an ICC as a slave device.
IOM®-2 Interface Power Saving Option
In order to reduce power consumption on the IOM interface to a minimum while in the
operational state the IDP0 and IDP1 pins may be connected as illustrated in figure 32. This
option is only available in IOM-2 terminal mode.
When programmed as open drain i/o’s, pull-ups should be connected to IDP0/1 in order to
obtain a well-defined "high" voltage for a logical "1" when the driver is in high-impedance.
However, a pull-up resistor connected to a static VDD has the disadvantage that power is
unnecessarily dissipated (according to the R/2 law) when a "low" is output. Moreover, a static
pull-up resistor does not exploit the knowledge about the timing of the receiver at the other end.
These two disadvantages are largely avoided when using pins X1 and FSC2 for pull-ups on
IDP0 and IDP1, respectively. As shown in the timing diagram in figure 32:
– X1 (FSC2) is connected to VDD when nothing is being transmitted on IDP0 (IDP1)
– X1 (FSC2) is not connected when a "0" is being output on IDP0 (IDP1) (which has the effect
of reducing the power consumption practically to "0" during this time)
– X1 (FSC2) is connected to VDD when a "1" is to be transmitted and is indeed being latched
by the destination.
Semiconductor Group
64
INFINEON [ Infineon ]
