Functional Description
2.4
IOM®-2 Mode Functions
2.4.1
IOM®-2 Frame Structure / Timing Modes
The IOM-2 is a generalization and enhancement of the IOM-1. While the basic frame structure
is very similar, IOM-2 offers further capacity for the transfer of maintenance information. In
terminal applications, the IOM-2 constitutes a powerful backplane bus offering
intercommunication and sophisticated control capabilities for peripheral modules.
The channel structure of the IOM-2 is depicted in figure 27.
M M
B1
B2
MONITOR
D
C / Ι
R
X
ITD02582
Figure 27
Channel Structure of IOM®-2
* The 64-kbit/s channels, B1 and B2, are conveyed in the first two octets.
* The third octet (monitor channel) is used for transferring maintenance information between
the layer-1 functional blocks (SBCX, IECQ) and the layer-2 controller (see chapter 2.4.4).
* The fourth octet (control channel) contains
– two bits for the 16-kbit/s D channel
– four command/indication bits for controlling activation/deactivation and for additional control
functions
– two bits MR and MX for supporting the handling of the MONITOR channel.
In the case of an IOM-2 interface the frame structure depends on whether TE- or non-TE mode
is selected, via bit SPM in SPCR register.
Non-TE timing mode (SPM=1)
This mode is used in LT-S and LT-T applications. The frame is a multiplex of eight IOM-2
channels (figure28), each channel has the structure in figure 27.
The ISAC-S is assigned to one of the eight channels (0 to 7) via register programming
(ADF1:CSEL2-0).
Semiconductor Group
58
INFINEON [ Infineon ]
