Functional Description
2.3.3
SLD Interface
The standard SLD interface is a three-wire interface with a 512-kHz clock (DCL), an 8-kHz
frame direction signal (TE mode: FSC1/2 output; LT-S/LT-T modes: FSC1 sync input), and a
serial ping-pong data lead (SIP) with an effective full duplex data rate of 256 kbit/s.
The frame is composed of four octets per direction. Octets 1 and 2 contain the two B channels,
octet 3 is a feature control byte, and octet 4 is a signaling byte (figure 17).
The SLD interface can be used in:
– Terminal applications (TE) as a full duplex time-multiplexed (ping-pong) connection to
B-channel sources/destinations.
CODEC filters, such as the SICOFI® (PEB 2060) or the ARCOFI (PSB 2160) as well as other
SLD compatible voice/data modules may be connected directly to the ISAC-S as depicted
in figure 16. In TE applications timing mode 0 (SPCR:SPM=0) has to be programmed,
hence SLD operates in master mode. Moreover, terminal specific functions have to be
deselected (STCR:TSF=0).
The µC system has access to B-channel data, the feature control byte and the signaling byte
via the ISAC-S registers:
– C1R (35 ), C2R (36 )
→
→
→
B1/B2
FC
H
H
– SFCR and SFCW (34 )
H
– SSCR and SSCX (33 )
SIG
H
The µP access to C1R, C2R and SFCR/SFCW must be synchronized to the serial
transmission by means of the Synchronous Transfer Interrupt (STCR) and the BVS-bit
(STAR) (see chapter 2.3.6).
B-Channel Source/Destination
SLD
ISDN Sunscriber Access
ISAC R -S
512 kbit/s
SIP
SLD Compatible
Voice/Data
Module
512 kHz
8 kHz
DCL
Timing Mode 0
TE Mode
FSC1/2
S
SLD OUT
SLD IN
Timing Mode 0
SIP
B1 B2 FC SIG B1 B2 FC SIG
FSC1/2
ITS00858
Figure 17
Connection of B-Channel Sources/Destinations to the ISAC®-S via SLD in Timing
Mode 0
Semiconductor Group
44
INFINEON [ Infineon ]
